Architecture
- An architecture is the implementation of an entity. It contains a declaration part and a statement part. The declaration part may for example declare types, components and subprograms that shall be internal within the architecture.
- An entity may have an unlimited amount of architectures. The architectures associated with the same entity must have unique names.
- An entity and its architectures belong to the same declarative region. Everything declared in the entity is therefore accessible in its architectures.
- At synthesis or simulation an architecure must be selected for each entity. If nothing else is specified, for example using a configuration, the last compiled architecture is used.
Syntax
architecture ArchitectureName of EntityName is
Declarations...
begin
ConcurrentStatements...
end [architecture] [ArchitectureName];
Placement
PACKAGE Pack IS
...
END PACKAGE Pack;
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PACKAGE BODY Pack IS
...
END PACKAGE BODY Pack;
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Blk:BLOCK
...
BEGIN
...
END BLOCK Blk;
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ENTITY Ent IS
...
BEGIN
...
END ENTITY Ent;
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ARCHITECTURE Arc OF Ent IS
...
BEGIN
...
END ARCHITECTURE Arc;
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CONFIGURATION Conf OF Ent IS
...
END CONFIGURATION Conf;
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Proc:PROCESS(...)
...
BEGIN
...
END PROCESS Proc;
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PROCEDURE P(...) IS
...
BEGIN
...
END PROCEDURE P;
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FUNCTION F(...) RETURN Tp IS
...
BEGIN
...
END FUNCTION F;
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Rules
All the architectures of a particular entity must have different names, but the architectures of two different entities can have the same name.
Things to remember
It is easy to forget the begin, or put it in the wrong place!
Example
library IEEE;
use IEEE.STD_LOGIC_1164.all;
architecture BENCH of TEST_MUX4 is
subtype V2 is STD_LOGIC_VECTOR(1 downto 0);
-- Component declaration...
component MUX4
port (
SEL : in V2;
A : in V2;
B : in V2;
C : in V2;
D : in V2;
F : out V2
);
end component;
-- Internal signal...
signal SEL, A, B, C, D, F: V2;
begin
P: process
begin
SEL <= "00";
wait for 10 NS;
SEL <= "01";
wait for 10 NS,
SEL <= "10";
wait for 10 NS,
SEL <= "11";
wait for 10 NS;
wait;
end process P;
-- Concurrent assignments...
A <= "00";
B <= "01";
C <= "10";
D <= "11";
-- Component instantiation...
M: MUX4 port map (SEL, A, B, C, D, F);
end BENCH;
See Also
Entity, Configuration, Configuration Specification, Concurrent Statement
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